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- C 84.9%
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| Filename | Latest commit message | Latest commit date |
|---|---|---|
| CPU | ||
| esp32s3 | ||
| FPGA | ||
| scripts | ||
| stm32g431 | ||
| .gitignore | ||
| Makefile | ||
| README.md | ||
RF project
openocd -f interface/ftdi/um232h.cfg -f target/zynq_7000.cfg
if you want to use only FPGA you can load fsbl with bitstream right after if you want only CPU you use the fsbl + application.elf if you want to use both CPU + FPGA you need to use block diagram and connect the fpga design to the processing system and make a special xsa + fsbl with bitstream
PLAN
set up linux / rt linux use scp and ssh to program fpga use mmap or .ko to write drivers for io and fpga io use non propietary tools